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This blog was build to share and discuss verilog projects. We are a team who love sharing data and provide an interactive platform. Our team believes in the idea of "information sharing" which is the game changer in the current era.

We are currently making this blog inter-disciplinary and will be publishing any article not limited to verilog.  Anyone who is willing to contribute your article can share it to : verilogblog@gmail.com. We will happy to share it if it is worthy . Please share following details when you send us your arcticle :
Name:
Profession/company name/college name:

Mention " article submission " in the mail Subject. 











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19 comments:

  1. Unknown13 August 2013 at 11:12

    good thinking dude....

    ReplyDelete
  2. Unknown26 February 2014 at 07:09

    EDUCATION SERVICE MAKE THE FUTURE GENERATION TO STANDARD LEVEL... NICE JOB SIR!!!! THANK YOU

    ReplyDelete
  3. Anonymous5 June 2014 at 07:33

    Hello sir i needed your help,can you please mail me on mohsin266@gmail.com.

    ReplyDelete
  4. chaitanya11 February 2015 at 16:55

    Really helpful and nice of u to share. Surely i will do my part in this good cause.

    ReplyDelete
  5. Abhirami RS18 February 2015 at 22:48

    sir my project is image encryption and decryption using Elliptic curve cryptography and i wanted to extend it to harware using FPGA..sir i just want to know whether its possible to have hardware for the same..waiting for you valuale suggestions..please reply sir :) :)

    ReplyDelete
    Replies
    1. Vlsi Verilog30 April 2017 at 08:48

      Any code which passes the synthesis ( on the target FPGA) can be tested on FPGA without any issues.
      Go through the RTL in detail and clear all " warning" too before you try FPGA

      Delete
  6. Unknown23 January 2016 at 10:46

    Hi Guys, Can you please help me with the Prefix Adder Verilog Code. I have done it but not able to get the exact answer for it.

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  7. Anonymous15 January 2017 at 02:57

    can you please help me with the detailed procedure of 8-bit vedic multiplier using barrel shifter by using nikhilam sutra.

    ReplyDelete
  8. Arturo Villegas26 January 2017 at 19:10

    Excuse me sir but I hope you can help me. I have a university project and I need to know how to build a led RGB 4x4x4 cube. I do not have the slightest idea how to start it, if you help me with this, I will be indebted to you. Thank you very much for your time. This is my mail in case you decide to help me fertrojas@gmail.com

    ReplyDelete
  9. Muttu raj17 May 2017 at 10:10

    Hi everyone,I need sum help in order to write surf algorithm in verilog code,,,pls will you help me in this

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  10. Anonymous12 November 2017 at 10:00

    Verilog implementation of CSD multiplier

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  11. Unknown12 October 2018 at 23:05

    hi sir my project is
    design of cache memory with cache controller using verilog hdl code
    can please post the code for this

    ReplyDelete
  12. Shashi Kant Kumar9 December 2019 at 22:15

    hi sir my project is transfer 24 bit data serial & parallel and interface FX2 connector in spartan 3E please post the code for this

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  13. Unknown16 December 2020 at 01:03

    Hi sir, I need some help in my project as I'm in need of codings for three adders, Kogge stone adder, Brent kung adder, Han clasron adder. Please do ping me to my Mail I'd if you have codings for these adders for 8 &16bit. My mail id is ramshruthir@gmail.com

    ReplyDelete
  14. Unknown23 March 2021 at 10:16

    Hello everyone.
    can someone help me in my project . my project is implementation of arm microcontroller in verilog . please share the code to my email - namitanandwani189@gmail.com
    thankyou in Advance.

    ReplyDelete
  15. Anonymous3 February 2024 at 04:51

    hello sir my self nandkishore salimath im student of klg gogate instituation of techanology belguam kranataka ece departmant i am doing a project on microwave oven countroller by verilog imy program is snot syntessing can help in this project mail@ nandkishore.alimath@gmail.com

    ReplyDelete